Power Analysis Of Digital Filters Implemented On FPGAs
نویسنده
چکیده
The proposed work is to analyze the power consumption of Finite Impulse Response (FIR) filter under different combinatorial modules. Under the considered modules namely Parallel, serial and Distributed Arithmetic(DA) architectures, effects of variation of clock frequency, leakage capacitance, supply voltage are chosen to determine power consumption and junction temperature. Each module is simulated using Mentor Graphics ModelSim SE6.5 and the results are presented. Keywords—FPGAs; Distributed Arithmetic (DA); Power Analysis; Finite Impulse Response (FIR) filter; Look-Up table (LUT); Complementary Metal Oxide Semiconductor (CMOS).
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